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NCP1351
V CC
C t
270p V CC
C t
IC t
10 m
Reset
V offset
FB
I FB
I FB
500mV
-
Clock
+
+
C1
100n
R1
2.5k
D FB
I FB
R FB
45k
V CC
C3
22pF
CS
ICS min
I diff
I diff
I diff = ICS max - ICS min
R offset
3.9k
to R sense
Figure 15. The Feedback Section Inside the NCP1351
f (IFB)
The FB pin can actually be seen as a diode, forward biased
by the optocoupler current. The feedback current, I FB on
Figure 15, enter an internal 45 k W resistor which develops
a voltage. This voltage becomes the variable threshold point
for the capacitor charge, as indicated by Figure 10. Thus, in
lack of feedback current (start-up or short-circuit), there is
no voltage across the 45 k W and the series offset of 500 mV
clamps the capacitor swing. If a 270 pF capacitor is used, the
maximum switching frequency is 65 kHz.
Folding the frequency back at a rather high peak current
can obviously generate audible noise. For this reason, the
NCP1351 uses a patented current compression technique
which reduces the peak current in lighter load conditions. By
load conditions, the feedback current is weak and all the
current flowing through the external offset resistor is:
ICS + ICS_min ) Idif + ICS_max * ICS_min ) ICS_min
+ ICS_max (eq. 13)
As the load goes lighter, the feedback current increases and
starts to steal current away from the generators. Equation 12
can thus be updated by:
ICS + ICS_max * kIFB (eq. 14)
Equation 13 testifies for the current reduction on the offset
generator, k represents an internal coefficient. When the
feedback current equals I dif , the offset becomes:
design, the peak current changes from 100% of its full load
ICS + ICS_min
(eq. 15)
value, to 30% of this value in light load conditions. This is
the block placed on the lower left corner of Figure 15. In full
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